[1.1.12] Combinator not outputting all signals when pulsed

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phyberosis
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[1.1.12] Combinator not outputting all signals when pulsed

Post by phyberosis »

First, thanks for a great game!
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Basically, the combinator is not outputting all signals during a 1 tick pulse. Also fails on a 2 tick long pulse.

Setup:
Image
I have a clock signal C (simulated by constant combinator so that I can take the image).
C increments by 1 per tick until 59, then resets.
When C is 2, the decider combinator passes along the 4 signals (belt, wire, coal, inserter).
Below is the setting of the combinator.
Image

Bug:
Attaching a copy of the same combinator to the green network with the same settings, I expect it to pulse the 4 signals when C is 2.
Instead it just pulses signal C with value 2. The other 4 signals are absent from the output.
When C is held at 2, the 4 signals are passed on, but when C is pulsed from a clock, the combinator doesn't pass them.
Image

Significance:
I would like to carry multiple signal sets for requests on a circuit network by giving each set a time slice marked by the clock pulse.

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boskid
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Re: [1.1.12] Combinator not outputting all signals when pulsed

Post by boskid »

I looked at the save file and there is nothing wrong in game. You are trying to get multiplexing but it is broken because the clock signal is provided to the green cable through 2 paths: one is directly by the green wire from the clock and the second one is through the decider combinator that pulses output on when the clock tick matches. Because of that when C=2 in the next tick the selector will output all 4 signals with C=2 but the C signal will sum on the green wire giving you a set of all 4 signals with C=5 (even when clock is right now at 3). This also shows some misunderstanding about circuit network: all the combinators introduce 1 tick delay and you want to catch the signal using original C but the values will be sent to the green wire with delay of 1 tick.

phyberosis
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Re: [1.1.12] Combinator not outputting all signals when pulsed

Post by phyberosis »

You're right, I removed the copied clock signal and delayed the write to memory using an arithmatic combinator.
It works now!

Multiplexers, cool.

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