Search found 11 matches

by charredUtensil
Sat Aug 15, 2026 4:52 pm
Forum: Tools
Topic: Syntax for describing 2.0 - style combinators?
Replies: 1
Views: 776

Re: Syntax for describing 2.0 - style combinators?

I've been thinking about this a bit more. The CNIDE syntax is close enough with some modifications:

Signals can be referred to with dot notation within most definitions as WIRE_NAME.signal_name .

This can create invalid combinations when more than two wires are specified.
This also means the ...
by charredUtensil
Sat Aug 15, 2026 3:31 pm
Forum: Ideas and Suggestions
Topic: Make everything circuit connectable and add a functions to a few
Replies: 6
Views: 573

Re: Make everything circuit connectable and add a functions to a few

Definitely +1 to infinity chest contents being circuit controlled. I've been using the editor to create a blueprint book for a 2.1 playthrough once it's stable. I'm using infinity chests extensively to test throughput under both ideal and specific degraded conditions. This would make it so much ...
by charredUtensil
Sun Aug 02, 2026 3:36 am
Forum: Tools
Topic: Syntax for describing 2.0 - style combinators?
Replies: 1
Views: 776

Syntax for describing 2.0 - style combinators?

Hey folks - A few years decade ago I built a project to help me figure out how circuit networks work and how to build them. In the process, I ended up coming up with a notation to describe circuit networks as a sort of "code". I left that project to rot when changes in Factorio and a few mods ...
by charredUtensil
Thu Jul 23, 2026 2:56 am
Forum: Minor issues
Topic: [2.1.11] Wires between two walls are not preserved on undo
Replies: 2
Views: 340

Re: [2.1.11] Wires between two walls are not preserved on undo

I did some more tests of this and found that it does reproduce on 2.1.12, and that given a large set of wires connecting arbitrary walls together, it appears to be deterministic which connections fail to restore, but there's no clear pattern.
by charredUtensil
Tue Jul 21, 2026 3:35 am
Forum: Minor issues
Topic: [2.1.11] Wires between two walls are not preserved on undo
Replies: 2
Views: 340

[2.1.11] Wires between two walls are not preserved on undo

1. Build two separate gate segments with walls around them
2. Connect a green wire between the two gates
3. Use the deconstruction planner to mark both gates for removal
4. Undo

Expected: Walls and gates are unmarked for destruction and green wire is restored between gates
Actual: Walls and gates ...
by charredUtensil
Sat Jul 01, 2017 4:35 pm
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Re: Cnide - an IDE for Circuit Network development [ALPHA]

I've fixed a bunch of these issues. Still working on the operators, though.
I've thought about the "labels vs comments" issue and I think the best answer is to use `#`s for labels. So, the syntax for labels is the comment syntax from Python. I could take this a bit further and steal the header ...
by charredUtensil
Tue Jun 27, 2017 5:14 am
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Re: Cnide - an IDE for Circuit Network development [ALPHA]

Wow! Thanks for the constructive feedback!
- Comments: Makes sense. There's also a reason it doesn't accept multi-line comments - because of a design decision to propagate the comments into the simulator as "labels" and the fact that it might be confusing you can't insert a comment in the middle of ...
by charredUtensil
Mon Jun 26, 2017 5:12 am
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Re: Cnide - an IDE for Circuit Network development [ALPHA]

I've changed the syntax a bit to something a little more sane. It now supports describing sub-networks. I've also updated the UI a little bit to be more intuitive.
by charredUtensil
Sun Jun 11, 2017 4:12 pm
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Re: Cnide - an IDE for Circuit Network development [ALPHA]

I've added a debug pane which should make it a little easier to understand what's going on - especially to answer the question of "is the simulation running"?

Here's a practical example of something I actually built. This is a circuit which is connected to my "internet". It controls when / how many ...
by charredUtensil
Sat Jun 10, 2017 8:22 pm
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Re: Cnide - an IDE for Circuit Network development [ALPHA]

I've provided a few examples in the README.

The project is indeed on GitHub Pages. I was just unable to post a link to it.
Application:
https://charredutensil.github.io/cnide/
Project page:
https://github.com/charredutensil/cnide

I'll post a tutorial later, but it should be fairly self explanatory.
by charredUtensil
Sat Jun 10, 2017 7:10 am
Forum: Tools
Topic: Cnide - an IDE for Circuit Network development [ALPHA]
Replies: 9
Views: 12821

Cnide - an IDE for Circuit Network development [ALPHA]

So, I was trying to develop a sort of... internet in the map I started for 0.15, in order to let different parts of my factory communicate with each other through one global wire across the whole map. I was dealing with a host of issues, the most frustrating of which was remembering which virtual ...

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