Hi,

Thanks for the idea! I've updated the latch for more general usage. Red wire is used as a memory cell.

A > 0 is the set signal.
B > 0 is the reset signal.

The logic I thought of is as follows:
We want to output S if A > 0 or S > 0, but not B > 0, so
[(A > 0) OR (S > 0)] AND [NOT (B > 0)]
[(A ...