Logic Friday Design using combinators (Decision Tables/Karnaugh maps)
Posted: Wed Aug 26, 2015 5:23 am
by HeilTec
Experiment with Factorio and "Logic Friday"
When designing any kind of logic functionality one must always start with some sort of specification.
To get things rolling an example is needed. With the possibility to read Storage Tanks and control pumps by wire network -
let's make a fluid balancer (for petroleum gas) since that would be handy.
To be useful it should handle both situations of either plenty or scarcity.
intro
Identifying needed (independent) inputs
To distribute the fluid we start by setting up the tanks and pumps.
TanksPumps.intro.png (207.8 KiB) Viewed 14856 times
The current Oil inventory Is measured in Tank A
Pump 1+2 splits it into Tank B+C
Pump 3+4 distributes to the consumers.
The measured contents of tanks A to C is a real number, so it needs an input conditioner to render a single status bit for the contents.
This can be accomplished using a Hysteresis response
Hysteresis.response.png (3.16 KiB) Viewed 14856 times
While input remains below maX the output is "0" - after triggering - the output remains "1" until the value drops below miN.
Using the opensource program "LogicFriday" a truth-table can be input.
truth
Hysteresis.truthtable.png (26.95 KiB) Viewed 14856 times
This can be a quite demanding process, to assign each combination of inputs to the output needed.
Besides the 2 threshold inputs a state bit "S" is input, and next state "S1" is fed back to the S-bit (state-bit) making this an asynchroneous combinatorial state machine (aka. More-machine) with potential race conditions if inputs change sumultaneously. In this case we seem safe since X and N can not both change, but the delay in the logic could cause race between the S-bit and the inputs. Very short transients sent to the pump control will not be a hazard - just a slight error in dosis.
In this case it is fairly straight forward. S stays at 0 until X=1 then stays 1 until N=1. Both N=1 and X=1 is not possible and don't-cares "X" can be used. When S changes state, then the V-bit can be dont-care.
friday
Operations -> Minimize:
Minimize.png (9.92 KiB) Viewed 14856 times
Result
Hysteresis.minim.png (29.63 KiB) Viewed 14856 times
Operation -> Map to Gates
MapToGates.png (11.38 KiB) Viewed 14856 times
Result
Hysteresis.mapped.png (32.77 KiB) Viewed 14856 times
Combinator build.
Hysteresis.A.png (345.09 KiB) Viewed 14856 times
Now the inputs are ready, the State machine for the pump control can be designed.
big truth
Truthtable.png (34.28 KiB) Viewed 14856 times
Here the "S"-bit indicate on of two states: collect (S=0) and distribute (S=1)
Going through each combination would be tedious.
min
Minimized
S1 = B C + S B + S C;
P1 = S' B' + S A C;
P2 = S' C' + S A B ;
P3 = S A C + S B ;
P4 = S A B + S C;
manumap
By using boolean algebra a manual gate mapping can be made:
Recognizing common terms as internal variables
V1 = S A;
V2 = S B;
V3 = S C;
V4 = B C;
V5 = V1 C;
V6 = V1 B;
V7 = S' B';
V8 = S' C';
3 inverters and 12 gates can implement these equations. (Limited number of attachments - Image missing)
Minimized + mapped. (Limited number of attachments - Image missing)
The automatic mapping beat me by 2 components in the count, but the actual build is based on the manual gate map. (Limited number of attachments - Image missing)
Overview
All in one (10 = max attachments)
Overview.png (827.6 KiB) Viewed 14856 times
logic
Logic state machine
(Limited number of attachments - Image missing)
The combinator condition "any" can OR as many signals as needed (The red wire network with V2 + V3 + V4 are using this as wired OR in S1)
(Limited number of attachments - Image missing)
A single green network distributes all the internal variables (V1 - V8) with lamps as status/debug output. (Limited number of attachments - Image missing)
All the pump control bits are simple two input OR gates
Would be cool to make a pdf out of it, cause I guess, that this rtf cannot be displayed by everybody.
Right on both points:
1. Before I tried the LogicFriday tool I actually used Karnough maps to get to the boolean functions. How nice to find friendly free tools to remove the toil and many possibilities to fail. After this I tried another little tool called "LogiSim" - due to the poor circuit editing interface in LogicFriday. LogiSim was used to draw the manual map circuit that was built in-game using just the equations.
2. The .rtf is my working copy I prepared before posting. Unable to fit all the images I ended up just sharing the raw file. It would be nice if some better format could be used for both working on it and sharing. The Images in the .rtf are .jpg - they are also available in .png
Re: Logic Friday Design using combinators
Posted: Wed Aug 26, 2015 1:47 pm
by Lupoviridae
Seeing this, I think it would be a REALLY great addition if it were made so that in in the Alt info overlay for the game, red and green wires were thicker/highlighted, like what you have in the diagram. It would really help.
Re: Logic Friday Design using combinators
Posted: Wed Aug 26, 2015 9:33 pm
by HeilTec
Lupoviridae wrote:Seeing this, I think it would be a REALLY great addition if it were made so that in in the Alt info overlay for the game, red and green wires were thicker/highlighted, like what you have in the diagram. It would really help.
Why stop there - show signals on the poles (as extended option)
Re: Logic Friday Design using combinators (Decision Tables/Karnaugh maps)
Posted: Thu Nov 24, 2016 4:52 pm
by provet
Interesting will definitely take a look at this during the weekend!