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Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sat Jun 10, 2017 7:10 am
by charredUtensil
So, I was trying to develop a sort of... internet in the map I started for 0.15, in order to let different parts of my factory communicate with each other through one global wire across the whole map. I was dealing with a host of issues, the most frustrating of which was remembering which virtual signals I'd been using for which purposes. I thought this might be a lot easier if I could just name the variables arbitrary text strings and long story short ended up inventing a programming language to describe circuit networks.
The forums won't let me post URLs yet, but I will say that the project is on GitHub, and that my username here is also my username there.
It's been a few years since I've used GitHub or built a small JS application like this. It's written in pure CSS+ES6 without any fancy frameworks or bootstrapping, except for the parser which is written in PEG.js because I'm not crazy enough to write my own parser from scratch. Also, I've only bothered testing this on Chrome for desktop and Android (I do NOT miss making the CSS work in IE9). I'll care about Firefox and Safari if anyone else cares enough.
This is really just a minimum viable product and by no means complete. However, it may be useful to some people now, hence my posting. I come with questions, though. I'd love to get some opinions from other players on the syntax. Also, is this even a thing other people would find useful? Be honest. If there's potential here, I'll develop further, but if not I'll just go back to... playing some video game.
Here are the planned features in roughly the order I plan to add them:
- General code cleanup
- Live debug pane that shows the realtime values of wires
- Ability to define macros / sub-networks that can be reused
- Use FontAwesome icons instead of some unicode characters I found
- Save / Load functionality
- Resolve which wires are red / green and throw errors if the combination isn't possible in Factorio
- Export blueprints (I did the math on paper and there's a decent algorithm for this)
Please let me know what you think, and enjoy!
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sat Jun 10, 2017 7:03 pm
by fimdomeio
Hey. Looks fascinating but I can't really understand how it works.
I would suggest that you write a small tutorial so people can at least know how to get started.
Also maybe hosting it on github pages so people don't even have to download it.
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sat Jun 10, 2017 8:22 pm
by charredUtensil
I've provided a few examples in the README.
The project is indeed on GitHub Pages. I was just unable to post a link to it.
Application:
https://charredutensil.github.io/cnide/
Project page:
https://github.com/charredutensil/cnide
I'll post a tutorial later, but it should be fairly self explanatory.
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sun Jun 11, 2017 4:12 pm
by charredUtensil
I've added a debug pane which should make it a little easier to understand what's going on - especially to answer the question of "is the simulation running"?
Here's a practical example of something I actually built. This is a circuit which is connected to my "internet". It controls when / how many trains should be dispatched from a station which produces "product". Specially crafted signals over the "internet" tell it when to send a train. It keeps track of how many trains to send and decrements the counter each time it sends one. Since this is a simulator, there's a button for sending the "internet" signal and another button that toggles the signal which detects whether there's a train present in the station. Paste this into Cnide to see it in action:
Code: Select all
// Train Dispatcher
// Sending a signal over the network indicates that a train should be dispatched.
// The station keeps count of how many trains are remaining to dispatch.
// The LOAD_COUNTER is connected to the train station and trains are allowed to leave if loads_ready > 0.
LOAD_COUNTER -> [loads_ready]
// Send Network Message
// Message indicates dispatch from central cpu
// Product count differentiates factory # if multiple exist
// Loads ready is the payload
-> NETWORK {message: 1, loads_ready: 1, product: 1} as pulse
// Presence of train in station
// (on = present)
-> TRAIN_SIGNAL {red: 1} as toggle
// Receive load requests
NETWORK -> LC_IN message=1 then x as 1
NETWORK -> LC_IN product=1 then x as 1
NETWORK -> LC_IN each+0 as each
LC_IN -> LOAD_COUNTER x=2 then loads_ready
LC_IN -> NETWORK x=2 then ack as 1
LOAD_COUNTER -> LOAD_COUNTER loads_ready+0 as loads_ready
// Dispatch trains
TRAIN_SIGNAL -> TD_IN red>0 then x as 1
LOAD_COUNTER -> TD_IN loads_ready>0 then x as 1
TD_IN -> DISPATCH x=2 then green as 1
TRAIN_SIGNAL -> TD_DEC red=0 then x as 1
TD_IN -> TD_DEC x=2 then x as 1
-> TD_DEC {loads_ready: -1}
TD_DEC -> LOAD_COUNTER x=2 then loads_ready
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Mon Jun 26, 2017 5:12 am
by charredUtensil
I've changed the syntax a bit to something a little more sane. It now supports describing sub-networks. I've also updated the UI a little bit to be more intuitive.
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Mon Jun 26, 2017 2:24 pm
by Muche
Some notes if you decide to develop this further:
comments are allowed only inside network definitions, I'd expect them to work anywhere
a list of supported operators would be nice, e.g.
>=,
!=,
&, and
| might not be as obvious as other operators
power operator is missing (overriden and easily confused with
^ operator which does bitwise XOR)
supported numbers seem to be
double, Factorio's numbers are
long; I've seen some circuits that depend on overflow
combinators support numbers on left side, Factorio only signals
the following program doesn't accept
anything at line 11, changing it to
any or
everything accepts it, but doesn't run (tick # doesn't change after clicking
Step,
Slow or
Fast):
Code: Select all
Main() {
pulse as {iron: 3} -> INPUT
MemoryWriteOnce(IN=INPUT, OUT=OUTPUT, sig=iron)
Test(WIRE=INPUT, signal=copper)
R -> [s]
}
MemoryWriteOnce(IN, OUT, sig) {
// Reset
pulse as {s: -1} -> (R, G2)
// (IN, OUT) -> anything != 0 then 1 as s -> R
(IN, R) -> s = 0 then everything -> OUT
(OUT, G2) -> s = 0 then everything -> OUT
OUT -> [sig]
OUT -> [iron]
OUT -> [copper]
OUT -> [signal]
}
Test(WIRE, signal) {
pulse as {signal: 1} -> WIRE
toggle as {signal: 2} -> WIRE
}
in the previous program, signal
signal in the network
Test doesn't seem to be translated, Main's wires have non-zero
signal signal, not
copper signal, as I had expected based on the call. Am I using it correctly?
It's been suggested elsewhere in the forums that that particular implementation of SR latch shouldn't be used, this one might be better:
Code: Select all
Main() {
(IN, SR) ->
a > b then 1 as a
-> SR
// Set
toggle as {a:1} -> IN
// Set (pulse)
pulse as {a:1} -> IN
// Reset
toggle as {b:1} -> IN
// Reset (pulse)
pulse as {b:1} -> IN
// Output
SR -> [a]
}
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Tue Jun 27, 2017 5:14 am
by charredUtensil
Wow! Thanks for the constructive feedback!
- Comments: Makes sense. There's also a reason it doesn't accept multi-line comments - because of a design decision to propagate the comments into the simulator as "labels" and the fact that it might be confusing you can't insert a comment in the middle of a combinator. If you have any ideas for a more formal "label" syntax (in addition to the comments), I'm all ears.
- Operators: Sounds good to me.
- Integers vs. doubles: I'm working on this now, actually.
- "any" and "all" breaking the simulator is a bug I've fixed in the next push.
- Signals in subnetworks don't replace within constant combinators. Yes, this is a bug.
- "anything" is a bug in the parser, which I've fixed in the next push.
- I'm not sure what to do with the SR latch implementation then - I was looking for something simple, easily played with, and with some matching diagrams / explanations on the wiki.
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sat Jul 01, 2017 4:35 pm
by charredUtensil
I've fixed a bunch of these issues. Still working on the operators, though.
I've thought about the "labels vs comments" issue and I think the best answer is to use `#`s for labels. So, the syntax for labels is the comment syntax from Python. I could take this a bit further and steal the header syntax from Markdown - i.e. the more #s you prepend, the smaller the text gets. Then, C-style comments can be treated as whitespace.
# This comment will appear in the simulator.
## This will appear in the simulator, but smaller.
### This will also appear, but even smaller.
// This won't appear in the simulator
/* This also won't appear. */
x + 0 as /* And now it can support comments in arbitrary places */ everything
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sun Mar 18, 2018 10:58 am
by kitty-dragon
I've been looking for an external tool to develop/debug CN for a long time, and it is the only working tool I found. So yeah, it has potential.
Do you have any interest in continuing the development?
I'm planning on fixing some stuff there (like adding much-needed blueprint export), so I'm curious what your plans are, so the code doesn't diverge too much.
Re: Cnide - an IDE for Circuit Network development [ALPHA]
Posted: Sun Oct 14, 2018 12:01 am
by User_Name2
This is very useful, thank you.
Any plans on blueprint export?