Signal multiplexer
Posted: Tue Jul 24, 2018 2:31 pm
I don't entirely know why you'd want to do this, other than "Because I can", which ... this is Factorio. That's a perfectly good reason. But anyway, fuinril was asking about multiplexing the contents of several different mining outposts onto the same wire (viewtopic.php?f=18&t=61238), and thoroughly nerd-sniped me. So I made a signal multiplexer/demultipexer.
It comes in three parts, and multiplexes its signals on the red wire.
The whole thing is driven by a clock, which outputs signals M and D. The constant combinator and the decider make a clock, and the two extra combinators produce signal D that lags M by two ticks. Set the constant in the decider combinator to at least the maximum channel ID. This is also the update interval; if you set it to 300, each multiplexed signal will update once every five seconds.
Connect the clock to the output of the multiplexer, and provide anything you like on the input. Do not put signals D, M, or Q on the input, though. (If you want to multiplex Q, you can, as long as you modify the demuxers appropriately.)
Set the middle combinator, which points toward the input, to test for M equal to the desired channel ID. (In this case, 3.) This is also relatively straightforward. This circuit copies its input to its output whenever the clock signal matches the desired ID. The middle combinator determines whether or not M is correct, the bottom one produces the input along with 1 on signal M, and the top one suppresses signal M again, so we don't mess up the clock. The output lags signal M by two ticks, so it synchronizes correctly with signal D.
The demultiplexer, at least for me, is the one that took a lot of thought. It takes the multiplexed signal on the red wire, and the channel to extract as signal Q on the green wire. The demuxer updates its output every time the inputs Q and D are equal (plus I think two ticks), so cycling Q through various values is probably not all that useful. The two left deciders produce everything (top) and D (bottom), if this is the correct clock cycle. On other clock cycles they produce nothing. The middle combinators take the "everything" and filter out signal D. The final combinator remembers what it was given the last time D was non-zero. (In the blueprint, I've replaced top-center decider with an each+0=>each arithmetic. It works the same and makes it easier to free up signal Q.)
If you want to multipex signal Q, (or just prevent Q from leaking out of the demuxer) remove the green wires, and change the combinators that look at Q to compare to a constant instead. I used an input here because bad things will happen if the combinators do not compare to the same value.
I've also attached a save, if you want to see it in operation. After the pattern of muxing mining outposts, I have five constant combinators that pretend to be mining outposts, and five demuxers that turn on 0 to 10 lights, depending on how much iron ore the corresponding constant combinator is reporting.
It comes in three parts, and multiplexes its signals on the red wire.
The whole thing is driven by a clock, which outputs signals M and D. The constant combinator and the decider make a clock, and the two extra combinators produce signal D that lags M by two ticks. Set the constant in the decider combinator to at least the maximum channel ID. This is also the update interval; if you set it to 300, each multiplexed signal will update once every five seconds.
Connect the clock to the output of the multiplexer, and provide anything you like on the input. Do not put signals D, M, or Q on the input, though. (If you want to multiplex Q, you can, as long as you modify the demuxers appropriately.)
Set the middle combinator, which points toward the input, to test for M equal to the desired channel ID. (In this case, 3.) This is also relatively straightforward. This circuit copies its input to its output whenever the clock signal matches the desired ID. The middle combinator determines whether or not M is correct, the bottom one produces the input along with 1 on signal M, and the top one suppresses signal M again, so we don't mess up the clock. The output lags signal M by two ticks, so it synchronizes correctly with signal D.
The demultiplexer, at least for me, is the one that took a lot of thought. It takes the multiplexed signal on the red wire, and the channel to extract as signal Q on the green wire. The demuxer updates its output every time the inputs Q and D are equal (plus I think two ticks), so cycling Q through various values is probably not all that useful. The two left deciders produce everything (top) and D (bottom), if this is the correct clock cycle. On other clock cycles they produce nothing. The middle combinators take the "everything" and filter out signal D. The final combinator remembers what it was given the last time D was non-zero. (In the blueprint, I've replaced top-center decider with an each+0=>each arithmetic. It works the same and makes it easier to free up signal Q.)
If you want to multipex signal Q, (or just prevent Q from leaking out of the demuxer) remove the green wires, and change the combinators that look at Q to compare to a constant instead. I used an input here because bad things will happen if the combinators do not compare to the same value.
Code: Select all
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